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(parent: 3e6f9ec) | patch
x86: add Ivy Bridge model numbers to model specific MSR handling
authorJan Beulich <jbeulich@suse.com>
Thu, 9 Feb 2012 11:07:39 +0000 (12:07 +0100)
committerJan Beulich <jbeulich@suse.com>
Thu, 9 Feb 2012 11:07:39 +0000 (12:07 +0100)
commit3487e40ba447dcff5d303cb68350b7879692185b
treee113768392ed1e31d1ea402e5931d3b272e7ef99tree | snapshot
parent3e6f9ecb2e122b45f1efe7b956c9490a0d53a8f4commit | diff
x86: add Ivy Bridge model numbers to model specific MSR handling

This is model 0x3a (decimal 58) as per the most recent SDM.

In vPMU code, also add a forgotten earlier model.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Xiantao Zhang<xiantao.zhang@intel.com>
xen/arch/x86/acpi/cpu_idle.c diff | blob | history
xen/arch/x86/hvm/vmx/vmx.c diff | blob | history
xen/arch/x86/hvm/vmx/vpmu_core2.c diff | blob | history
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